Updated October 11, 2010
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Updated for July 2007!
It's about time that Microwaves101 built up some content on amplifier
designs. We now have a MMIC LNA photo to discuss below. We'll point
out some of the features and provide some pointers on reverse engineering
Fellow microwave Dudes, we can
always use more photos of microwave hardware. Send us a picture
and you'll receive a cool Microwaves101
pocketknife! Be sure to ask the owner of the photo (your company!)
What's an LNA?
As Yoda might say, "near
the input of any receiver a low noise amplifier, positioned there
is". That reference was a tad random, but keep going, we will.
It's possible that some type
of filter, duplexer and/or receiver protection device is between
the LNA and the antenna, but nothing else. The primary characteristic
of an LNA is its noise figure, which
is a measure of how much the LNA degrades the signal-to-noise ratio
of the received signal. Other important characteristics of and LNA
are its linearity (measured in P1dB or third order intercept), and
its survivable power, its DC dissipation (particularly important
in battery-power wireless devices, and satellite systems).
Here's an image of a two-stage
LNA from a MMIC factory that is now probably rubble under a WalMart.
It illustrates series feedback, parallel
feedback, self biasing using grounded gates.
Let's indulge in some reverse
engineering for fun...
The active elements are FETs,
or perhaps PHEMTs. This is not an HBT circuit. Can someone send
us an image of an HBT ciruit please?
This two stage circuit is probably
X-band. How do we know that? The length of the series feedback lines
on the FETs seems right for X-band, go look at some X-band LNA layouts
at TriQuint and you'll see what we mean.
On the other hand, those small
RF bond pads could fool you into thinking that this was a millimeterwave
part. If the probe pitch at the GSG interface is 150 microns (it
probably is), the pads are only 75x75 microns. If this was an X-band
circuit the designer should have made room for two wire bonds on
one pad, this is impractical for MMW because the bond-pad capacitance
will be hard to overcome in a matching network. We think that this
was a non-production design, not meant to be wirebonded, just RF
The bright gold is probably sputtered,
if it was plated it would appear rougher. This metal is used to
form the transmission and bias lines. Nowhere on the chip is an
obvious 50 ohm line (often you'll see one at either input of output,
used to stretch the design to fit a certain grid spacing) but we
can speculate that the line impedance of most of the T-lines is
higher than 50 ohms (probably 70-80 ohms) to a facilitate inductive
Speaking of tuning, it looks
like lumped capacitors have all been sized so that they are near-short
circuits to RF and therefore not used as major tuning elements.
This could indicate that the foundry that made this product had
a bad reputation for variability in capacitor dielectric thickness.
There are two types of resistors
on the circuit. The most obvious are probably tantalum nitride metal
resistors and appear as gray rectangles that are connected between
the bias pads (source and drain resistors). These are on the order
of 10 to 50 ohms per square (depends on how thick they are). The
other type of resistor is a mesa resistor which is used to achieve
much higher sheet resistance values. There is only one mesa
resister, it is in the parallel feedback path on the second
transistor, to the left of the feedback capacitor.
The dark metal on the circuit
is the final plated metal. It is used at bond pads, and to create
air-bridge connections from the tops of the capacitors.
Words of wisdom
Often people are called to a
design review for circuits such as these to point out improvements
that the designer might have missed. If we attended the design review
for this chip we would have pointed out a few minor things. There
should be some lettering (at least some numbers) on the bias pads
to assist the assembler. The row-column numbers are missing which
are needed to track known good die after RF probing a wafer. This
is an indication that it was not regarded as a production-ready
design. Also we don't like the input and output blocking caps that
close to the RF bond pads where they might receive some tool damage,
but often this is unavoidable. At least on the output cap we would
suggest that the airbridge connection be moved to the other side
of the cap to get it farther from the wirebonding area. Pass the
Here's a schematic of the amplifier.
We created to help explain what is going on in an LNA design. This
is a great example, it uses grounded-gate self biasing, series and
parallel feedback, and resistor networks for bias adjustment!
The blocking capacitors CBL1,
CBL2 and CBL3 serve as near-short circuits to RF but allow the FETs
to be properly biased at the DC quiescent point. The source bypass
capacitors (CS1A, CS1B, CS2A and CS2B) provide RF grounds to the
FETs yet allow the opportunity to provide source resistors to set
the bias point.
Two types of feedback
The series feedback on the source
of the FETs allows the input match for best gain to coincide with
the input match for lowest noise figure. This is negative feedback,
the more feedback you introduce the lower the gain of the device,
so it's a double-edged sword. The designer used series feedback
on both stages, usually it is not required on the second stage (at
least to the same degree as the first stage). We think that the
designer stuck with series feedback on the second stage only out
of convenience, he/she probably had measured de-embedded data on
the feedback FET. By doing this, the design gives up a few dB in
potential gain, we would have decreased the feedback on stage two.
Parallel feedback is used on
the second stage of the design. This technique can be used to "burn
off" a ton of available gain below the band, with less effect
within the band where you want to maximize gain. This is also a
negative feedback, because there is a 180 phase shift between the
AC voltage on the gate terminal and the AC voltage on the output
terminal. You can to keep the feedback path quite short, or somewhere
north of your frequency band it might become positive feedback and
the amp becomes an oscillator!
Parallel feedback is never used
on the input of a good LNA, it degrades the noise figure of the
stage. This amp is no exception.
The bias point of a FET requires
a slight negative potential from gate to source. When the source
is DC grounded, this is done with a power supply connected to the
gate terminal. For an PHEMT LNA this voltage might be -0.6 volts.
Another way to get the gate-source
voltage to -0.6 volts is to ground the gate, and raise the source
potential to +0.6 volts by use of source resistors. If the FET stage
requires 15 mA DC current, the source resistor needed is 20 ohms.
The design we are discussing
has three choices for source resister on board the chip (RS1A, RS1B
and RS1C in the first stage, connected by grounding the appropriate
pad). There is also the opportunity for an off-chip source resistor
using the left-most source pad.
There is further description
of self-biasing techniques on our FET page.
Series feedback in LNAs
This cool concept is actually
covered in U. S. patent 4,614,915, Monolithic series feedback
low noise FET amplifier by inventors Heston and Lehmann,
1984. These two Texas cowboys discovered that by adding series
feedback to the source of a FET, it is possible to move the
input impedance match for lowest noise (ZOPT) very close to
the input impedance match for maximum gain (S11*). It looks
like the assignee of the patent (Texas Instruments originally,
probably TriQuint by now) never tried to enforce it, nearly
all LNAs use this technique today and few designers know that
it is patented!
Here's an image we cribbed
from 4,614,915. The series feedback lines are 32 and 34 which
connect the source (24 and 26) to vias to backside ground
(38 and 36). Note that this FET has but a single gate finger
(it's vertical, fed by 16). One thing that the inventors didn't
think of was to use bypass capacitors to establish RF ground
to the source, this design can't be self biased with source
resistors like the MMIC LNA we discussed.
Future topics (help us out here!!!)
Noise parameters of low noise
Temperature coefficients of
gain and noise figure